Analogue IC Layout Design Engineer - Contract - 6 Months
Cambridge £50 - £60 Per Hour
Become a member of a world-class analogue IC design team in providing high performance IC solutions for leading data communications and networking company. As a designer, you will have opportunity to design high performance RF, analogue and mixed-signal IPs and products in CMOS and FinFet technologies.
As a team member, you will participate in the whole product design cycle from definition of the circuit architecture and circuit implementation to the silicon test and validation.
·Responsible for layout design of a complex high-speed, low-noise mixed-signal IP in 16nm CMOS process.
·Hands-on block-level layout design and verification work, top-level IP floor-planning and integration,
·IC sign-off and tape-out.
·Work closely with analogue design team on IP floor-planning, trial layout design and parasitic extraction of critical structures.
·Propose circuit design changes.
·Co-ordinate layout design activities across multiple sites.
·Delegate block-level layout work when feasible.
·Collaborate with CAD, process technology, package design and digital back-end teams.
·Document own work and participate in design reviews.
·Provide guidance to junior team members.
·7 years of experience in design of high-speed or RF layout in advanced CMOS processes.
·16nm FinFET experience an advantage.
·High-speed ADC layout design experience an advantage.
·Good understanding of high-speed and low-noise layout design techniques and requirements.
·Experience in top-level integration and tape-outs.
·Knowledge of semiconductor device physics and process technology.
·Communicating effectively with circuit and layout designers.
Ability to work effectively and efficiently in a team environment
If you would like to hear more about this opportunity, or wish to be considered for this role, please forward me your latest CV for immediate review.
01173 328 100